Почему процессор MIPS имеет 32 регистра?

MIPS is a "RISC" or "load-store" architecture.

RAM used to be as fast as CPUs. So people would write programs that would use RAM as intermediate or temporary storage. Early CPUs only had a few registers due to this (i.e. 6502, Z80 - the 6502 only had 3 general purpose registers. Some CPUs like the TMS9900 actually used RAM as registers). This made the CPUs use less transistors which means they were cheaper, easier to get good yields from, easier to develop (no CAD-based chip design in the 70's...)

RAM being as fast as the CPU stopped being true around 1985 or so, and has only gotten worse.

RISC came to be partly to address this (this was before CPU cache was common or large like it is today) - by having a bunch of registers, slow RAM can be avoided a lot of time for intermediate calculation results and such.

Reducing the registers available means it has to go to slower RAM more often for this purpose.

I'm not precisely sure why 32 was selected as a "sweet spot" - other than it's 5 bits and I know MIPS opcodes have 3 5-bit fields, meaning they are easy to decode (another attribute of "RISC" philosophy) - and it's really 31 as the first register always returns 0.

In a system with register renaming, you can vary the number of physical registers and only affect performance.

But you can't very the number of register names without creating a totally new architecture. Try to remove some names, and programs that did use those names fail. Try to add some names, and the 5-bit encoding is no longer enough to describe them all.

You may try to use tricks like instruction prefixes to expand the instruction set to include extended instructions that accept more or different names while keeping the old encodings intact to enable backward compatibility. I'm not aware of anyone doing this with MIPS, but AMD64 aka EM64T aka x86_64 used the "extend with (mostly) backward compatibility" approach based on x86.

It didn't have to, but it's a nice compromise with other design decisions.

So first off, the instruction length in MIPS is 32 bits(most MIPS, there is a 64-bit version). (You can see lots of details how it breaks down here). In many MIPS instructions, you have to supply three registers, say two sources and one destination (r4=r2+r4 for example). The MIPS architecture allows 5 bits to specify each of those registers, and 32 is the maximum number you can represent with five bits, so there is no point giving you more registers that you can't access.

If MIPS let you have 6 bits to select a register then you could use up to 64 different registers, but those extra bits would have to come from somewhere, possibly by reducing the number of operations or addressing modes.

There are other approaches, some processors use bank switching, which is basically saying "I have these 32 registers I'm using right now, but I also have this special SWITCH instruction that let's me pull out these other 32 registers to use for a while before a switch back" it's handy for certain applications but conceptually difficult for some others.